1. Field of the Invention
The present invention generally relates to a method for manufacturing a mask for electron beam lithography and a mask blank for electron beam lithography.
2. Description of the Related Art
In general, a semiconductor integrated circuit or the like is formed by repetitively performing a variety of processes (e.g. deposition, oxidation, diffusion, etching) upon a semiconductor wafer.
Owing to today's very large scale integration of the semiconductor device, there is a need to form, for example, oxidized layers, or metal wires on a semiconductor wafer in submicroscopic sizes.
Therefore, a lithographic technique for forming sub-microscopic patterns, and an etching technique for anisotropically etching a resist film having a sub-microscopic pattern formed thereto are indispensable in fulfilling such need.
RIE (Reactive Ion Etching) providing highly anisotropic etching is one preferable example of the aforementioned etching technique.
Meanwhile, electron beam lithography is drawing attention as the aforementioned lithographic technique.
A projection aligner for demagnification may be used for electron beam lithography, in which a pattern is developed by demagnifying the pattern of a photomask (reticle) via a lens, and then by exposing the pattern upon a wafer having photo resist applied thereto. A projection aligner for equal magnification may also be used for electron beam lithography, in which a pattern of a photomask (reticle) is developed upon a wafer having photo resist applied thereto by exposing the pattern through a lens.
Although the projection aligner for equal magnification could be used in a case where the design rule for the target wafer is a relatively large pattern, or in a case where the photomask (reticle) is formed with a microscopic pattern, the projection aligner for demagnification is, in general, more preferably used in such cases.
The photomask (reticle) can be categorized into a stencil type and a membrane type based on the difference in the degree of transmitting an electron beam therethrough.
The stencil type mask (hereinafter referred as “lithographic mask”) is formed of a silicon layer having a sufficient thickness (approximately 2 micrometers) for preventing transmittance of an electron beam except at an aperture portion thereof, an insulating layer disposed below the silicon layer, and another silicon layer disposed below the insulating layer having a thickness of approximately several hundred micrometers to 600 micrometers for ensuring a certain rigidity.
The lithographic mask having the foregoing structure is preferably manufactured by employing an SOI (Silicon On Insulator) substrate having an SOI layer, a silicon base layer disposed below the SOI layer, and a BOX (Buried Oxide Layer) layer serving as an insulating layer disposed between the SOI layer and the silicon base layer.
A conventional manufacturing method of a lithographic mask using an SOI substrate will hereinafter be described with reference to FIG. 7A to FIG. 7E.
An SOI substrate 1 is formed of, for example, a BOX layer 3 serving as an insulating layer composed of SiO2 with a thickness of approximately a few micrometers, a silicon base layer 4 disposed beneath the BOX layer 3 having a thickness of approximately 600 micrometers, and an SOI layer 2 having a thickness of approximately 2 micrometers disposed on the BOX layer 3 (see FIG. 7A). It is to be noted that the thickness for each layer in the accompanying drawings including FIG. 7A to FIG. 7E are not illustrated in accordance with the ratio of the actual size.
In manufacturing a lithographic mask using the SOI substrate 1, a back side of the silicon base layer 4 is first coated with resist, and is then lithographically processed to form a resist film 5 (resist mask) with a desired pattern thereon (See FIG. 7A).
Next, with the use of the resist film 5 as a mask, the silicon base layer 4 is dry etched, that is, anisotropically etched with a gas containing Halogen or the like, to thereby form a pattern (See FIG. 7B).
Next, with the use of the silicon base layer 4 as a mask, the BOX layer 3 is dry etched, for example, with plasma containing an F radical such as CF4 The resist film 5 is then removed by ashing with oxygen plasma (FIG. 7C).
Next, a front side of the SOI layer 2 is coated with resist, and is then formed with a resist film 7 (resist mask) having a desired pattern by employing a lithographic process or the like (See FIG. 7D).
Next, with the use of the resist film 7 as a mask, the SOI layer 2 is dry etched, that is, anisotropically etched with a gas containing Halogen or the like, to thereby form a pattern. Finally, the resist film 7 is then removed by ashing with oxygen plasma to thereby complete manufacturing a stencil type mask 9 having an aperture 8 in the SOI layer 2 for transmitting an electron beam therethrough (See FIG. 7E).
In order to lithographically process the silicon base layer of the SOI substrate and then etch the silicon base layer and the BOX layer, the conventional method of manufacturing a lithographic mask requires the SOI substrate to be flipped in a state having a back side thereof (the side of the silicon base layer) faced upward and a front side thereof faced downward, in which the SOI substrate maintaining such state is fixed to a vacuum chuck or an electrostatic chuck for further conveyance or processing. Therefore, the conventional method of manufacturing a lithographic mask risks damaging the front side of the SOI layer when conveying or processing the SOI substrate, and may not be able to form a desired pattern.
Furthermore, in a case where the silicon base layer has a considerable thickness, forming a resist film with a typical thickness of a few micrometers would not be enough to prevent etching damage. Therefore, in order to ensure resistance against such etching damage, the resist film is required to be formed with a thickness of several ten to several hundred micrometers. Forming the resist film with such thickness is however inconvenient and causes complication in a coating process since the coating procedure is required to be performed repetitively for numerous times. Forming the resist film with such thickness could also cause difficulty in thoroughly removing etching residue in a cleaning process subsequent to an ashing process.
In order to lithographically process and then etch the SOI layer, the conventional method of manufacturing a lithographic mask requires the SOI substrate to be fixed to a vacuum chuck or an electrostatic chuck on the side of the silicon base layer (bottom side of the SOI substrate). Fixing the SOI substrate in such manner however could cause a problem such as deformation or damage to the SOI layer owing to the presence of a space portion (aperture) 6 shown in FIG. 7C.
It is therefore an object of the present invention to provide a method of manufacturing a mask for electron beam lithography and a mask blank for electron beam lithography, which could prevent a front side of an SOI layer of an SOI substrate from being damaged, and provide a mask for suitably etching a silicon base layer of an SOI substrate.
It is also an object of the present invention to provide a method of manufacturing a mask for electron beam lithography and a mask blank for electron beam lithography, which could prevent a problem, for example, deformation of an SOI layer in an etching process or the like, caused by the presence of a space portion formed at a silicon base layer.